Analog Circuit Design Techniques at 0.5V (Analog Circuits by Shouri Chatterjee, K.P. Pun, Nebojša Stanic, Yannis

By Shouri Chatterjee, K.P. Pun, Nebojša Stanic, Yannis Tsividis, Peter Kinget

This ebook tackles demanding situations for the layout of analog built-in circuits that function from ultra-low energy offer voltages (down to 0.5V). assurance demonstrates the sign processing circuit and circuit biasing ways during the layout of operational transconductance amplifiers (OTAs). those amplifiers are then used to construct analog process capabilities together with non-stop time clear out and a pattern and carry amplifier.

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25 V). This enables maximum output swing. The bias voltages at all the nodes in the circuit are indicated. 7 Summary 45 common-mode feed-forward circuitry in Fig. 8(b) can be included to improve the common-mode rejection of this OTA input stage. 2 Bias circuits The switching threshold voltage of the error amplifiers discussed in Fig. 12 are controlled by the voltage Vamp . This voltage, applied to the body of the nMOS device in the error amplifier, controls the threshold voltage of the nMOS devices in each error amplifier.

The output common-mode voltage of this stage is still controlled by Vbn , which now controls the current through M12A and M12B . 2 V. This limits the single-ended peak-peak voltage swing at the outputs of the OTA stage to only 100 mV. However, this is satisfactory for the input stage. 25 V). This enables maximum output swing. The bias voltages at all the nodes in the circuit are indicated. 7 Summary 45 common-mode feed-forward circuitry in Fig. 8(b) can be included to improve the common-mode rejection of this OTA input stage.

30(a) shows a single error amplifier. 30(a) is replaced with two nMOS devices, MN1 and MN2 , in Fig. 30(b). The input voltage is amplified by the devices MN1 and MP , while Vamp controls the current through MN2 . Thus Vamp controls the switching threshold voltage of the error amplifier in Fig. 30(b). This modified error amplifier does not require access to the body node of the nMOS device, and can be used in a feedback loop similar to Fig. 12(a) to determine Vamp . 2 respectively. The gainenhancement bias circuit is no longer required in the absence of any such bias voltage for the modified OTA stage in Fig.

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